Applies To:
  • CitectSCADA 3.00

Summary:
How to Connect Melsec PLC with A1SJ71C24-R4 To Citect  

Solution:
Users should set the Citect Communications Forms and A1SJ71C24-R4 Computer link/multidrop link module switches accordingly.

The default settings are:

Baud rate 19200
Data bits 7
Stop bit 1
Parity NONE
Station Number 1
Mode 5
Sum check ON

A1SJ71C24-R4 switch table

------------------------------------------------------------------------
|Switch | Setting Items      | Position of Setting Switch              |
|       |                    |         ON         |        OFF         |
|-------|--------------------|--------------------|--------------------|
|SW01   | Unused             |                    |                    |
|-------|--------------------|--------------------|--------------------|
|SW02   | Computer /multidrop|                    |                    |
|       | link selection     | Computer link      | Multidrop link     |
|-------|--------------------|--------------------|--------------------|
|SW03   | Unused             |                    |                    |
|-------|--------------------|--------------------|--------------------|
|SW04   | Write during RUN   |                    |                    |
|       | enabled/disabled   | Enabled            | Disabled           |
|-------|--------------------|--------------------|--------------------|
|       | Baud rate (BPS)    | 300 600 1200 2400 4800 9600 19200 <N/A> |
|-------|--------------------|--------------------|--------------------|
|SW05   | Transmission speed | OFF ON  OFF  ON   OFF  ON   OFF   ON    |
|SW06   |                    | OFF OFF ON   ON   OFF  OFF  ON    ON    |
|SW07   |                    | OFF OFF OFF  OFF  ON   ON   ON    ON    |
|-------|--------------------|--------------------|--------------------|
|SW08   | Data bit setting   | 8 bits             | 7 bits             |
|-------|--------------------|--------------------|--------------------|
|SW09   | Parity bit setting | Set                | Not Set            |
|-------|--------------------|--------------------|--------------------|
|SW10   | Even/Odd parity    | Even               | Odd                |
|-------|--------------------|--------------------|--------------------|
|SW11   | Stop bit setting   | 2 bits             | 1 bit              |
|-------|--------------------|--------------------|--------------------|
|SW12   | Sum check setting  | Set                | Not set            |
------------------------------------------------------------------------

 

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