Applies To:
  • CitectSCADA 4.xx, 5.xx

Citect seems to randomly add 16384 (2^14) to the displayed value (i.e.. most times it displays correctly, sometimes it adds 16384).

The Izumi counters have a maximum value of 9999, therefore they only need to use bits 0 to 13 (of the counter 16 bit word) to store the current counter value.

It is my guess that the 14th bit is being used to temporarily store the state of the counter input (in order to detect the low-to-high transition of the counter input pulse), and therefore this effect may not be noticeable when using a very short on-time pulse to drive the counter. My application was using a 50% duty cycle pulse with a 1 Hz frequency to drive the counter.


This problem has been fixed in version 5.20.