.When you configure a CitectSCADA system, you need to define each variable (register address) that CitectSCADA will read when your system is running. When your runtime system is operating, CitectSCADA calculates the most efficient method of reading registers. CitectSCADA optimizes communication based on the type of I/O Device and the register addresses.
When CitectSCADA requests data from an I/O
Device, the value of the register is not returned immediately; an
overhead is incurred. This overhead (associated with protocol
headers, checksum, device latency, and so on) depends on the brand
of I/O Device, and is usually several times greater than the time
necessary to read a single register. It is therefore inefficient to
read registers individually, and CitectSCADA usually reads a contiguous
block of registers. Because the overhead is only incurred once
(when the initial request is made), the overhead is shared across
every register in the block, increasing the overall efficiency of
the data
transfer.
However, reading a block of registers where only a small percentage of the block is actually used is also inefficient. If the registers that your CitectSCADA system will read are scattered throughout the memory of your I/O Device, excessive communication will be necessary. CitectSCADA needs to either read many contiguous blocks (and discard the unused registers), or read registers individually, degrading system performance. You can avoid this by grouping the registers that CitectSCADA will read.
CitectSCADA continually reads registers associated with alarms. (If an alarm condition occurs, CitectSCADA can display the alarm immediately.) therefore group registers that indicate alarm conditions.
Registers associated with status displays
(objects, trends, and so on) are only read as they are necessary
(that is, when the associated graphics
page is
displayed) and are appropriately grouped according to the pages on
which they are displayed.
Registers used for data logging are read at a frequency that you define. They are grouped according to the frequency at which they are read.
The following table shows an ideal register grouping for a CitectSCADA system:
| Digital Alarms | 
|
||
| Digital status unique to Graphics Page 1 | Analog status unique to Graphics Page n | ||
| Digital status unique to Graphics Page 2 | Analog status common to more than one Graphics Page | ||
|
|
Analog trends (for data logging) on largest timebase (for example 10 secs) | ||
| Digital status unique to Graphics Page n |
|
||
| Digital status common to more than one Graphics Page | Analog trends (for data logging) on smallest timebase (for example 1 sec) | ||
| All other digital status, for example for logging. | Analog alarms | ||
| Analog status unique to Graphics Page 1 | |||
| Analog status unique to Graphics Page 2 | |||
|
|
While memory constraints and the existing PLC program might impose limitations, grouping registers into discrete blocks, even if they are not consecutive blocks, will improve system performance.
When designing your system, allow several spare registers at the end of each block for future enhancements.
See Also